1. Field of the Invention
This invention relates to pulse compressors, and more particularly to a generalized Doppler matched binary pulse compressor which may employ either hard or soft limited signals.
2. Description of the Prior Art
In the prior art, a soft limited digital pulse compressor such as may be employed in the subject invention is disclosed in U.S. Pat. No. 4,679,210, Rathi, and assigned to the assignee of the present invention. It is also described in an article entitled "Detection Performance of Soft Limited Phase Coded Signals", by Dev D. Rathi, in the IEEE Transactions on Aerospace and Electronics Systems, Vol. AES-22, No. 1, January 1986, pages 79-86.
Other prior art in the general field is as follows. U.S. Pat. No. 4,231,100, Eggermont, relates to an arrangement for filtering compressed pulse code modulated signals, and presents a digital filtering methodology for non-uniformly quantized pulse code modulated signals. U.S. Pat. No. 4,673,941, Van Der Mark, relates to a digital pulse compression filter and presents a methodology for implementing digital pulse compression filters. U.S. Pat. No. 4,674,104, Bachtiger, relates to a circuit arrangement for the regulation of a multi-channel pulse compression filter, and discusses the implemention technique for multi-channel pulse compression systems. U.S. Pat. No. 4,661,819, Lewis, relates to a Doppler tolerant binary phase coded pulse compression system, and uses selective matched filtering (pulse compression/correlation) to remove Doppler sensitivity before pulse compression. U.S. Pat. No. 3,474,342, McGee et al., relates to a signal translation system and uses a filter bank in the analog domain, and has no pulse compression. Each channel of the filter bank includes a crystal, a detector and an integrator. The present invention addresses a broader issue of Doppler matching and matched filtering which is different than either the digital filtering or the matched filtering. Hence, Eggermont, Van Der Mark and Bachtiger have no comparison since these address different problems. Eggermont talks about digital filtering for nonuniformly quantized pulse code modulated signals. Van Der Mark and Backtiger both talk about pulse compression (correlation/matched filtering).
Lewis and McGee present methodologies for removing Doppler sensitivity which are different in time and concept. In the present invention the Doppler sensitivity is reduced during the pulse compression process by selection of an optimum overall filter.
With regard to the phase estimator of the present invention, the conventional approach of table look-up using programmable read-only memories is suitable for small data size. Such an approach is impracticable, for a typical data size of 16 bits each X(I) or Y(Q) quadrature data since using a 2.sup.12 word PROM would require 2.sup.32 +2.sup.12 =2.sup.20 PROMS, an astronomical number. With regard to the phase detector, U.S. Pat. No. 4,623,873, Mehrgardt, relates to a digital phase detector using N stage pipeline, where N is the number of bits in the representation of X(I) or Y(Q). First (N-1) stages are alike. Each stage uses two multipliers, an adder, a subtractor, changeover switches and a PROM. Two basic equations are defined therefrom. The phase .phi. is computed as follows: EQU U=X+bY (1) EQU V=X-bY (2)
and EQU .phi.=arctan of U/V+arctan b (3)
where EQU b=2.sup.-.gamma. ; .gamma.=1,2, . . . n (4)
Two methods described using the above equations vary only in implementation scheme used, N stage pipeline for high speed and recursive using uniprocessor for low speed applicatioons. While the end result may be the same, the important differences between the present invention phase estimator and Mehrgardt are as follows. There is a difference in concept as well as hardware. The phase estimator requires significantly less hardware. For example, for 16 bits each X(I), Y(Q) data the key hardware requirements for the subject invention and Mehrgardt are shown in Table A. In general, the hardware requirements for Mehrgardt using pipeline structure is directly proportional to data size, which in turn determines the length of the pipeline. In essence the subject invention is simple and easily adaptable to very high speed integrated circuit and application specific integrated circuit implementations.
TABLE A ______________________________________ HARDWARE REQUIREMENTS PHASE "DIGITAL PHASE ITEM ESTIMATOR DETECTOR" ______________________________________ 1. Pipeline 4 16 (n stages) stages Does not depend on Depends on data size data size 2. Multipliers 3 45 (2.times.(n-1)) Does not depend on Depends on data size/ data size/length of length of pipeline pipeline 3. Adders/ 3 45 (2.times.(n-1)) Subtractors Does not depend on Depends on data size/ data size/length of length of pipeline pipeline 4. Word PROMS 4 15 (n-1) (Table Lookup) fixed Depends on data size/ length of pipeline ______________________________________
It is accordingly an object of the present invention to provide a generalized Doppler matched binary pulse compressor.
It is another object of the invention to provide such a pulse compressor while minimizing the number of filter components.
It is still another object of the present invention to provide such a pulse compressor using an improved phase estimator.
Still another object of the present invention is to provide such a binary pulse compressor employing the steps of envelope detection, phase estimation, vector rotation, scaling while preserving the phase correlation (pulse compression/ matched filtering), and greatest-of-filter selection.